• module.json — Agentic module schema role assignments

🔧 Hardware — Triadic Processing Units & Substrate Logic

The hardware directory contains hardware‑aligned documents for TriadicFrameworks, including DPU notes, NPU architecture, and virtual NPU emulation logic.
These modules define how RTT mechanics map onto physical or virtual processing substrates.

Hardware modules are technical, operator‑aligned, and substrate‑aware.
They support:

• Triadic Processing Unit (TPU/NPU/DPU) design
• resonance‑aligned hardware logic
• virtual substrate emulation
• TFT/FFF operator mapping
• hardware‑level drift/coherence constraints

📁 Included Hardware Submodules#

Notes/Interns_DPU_notes.md#

Internal notes describing DPU (Drift Processing Unit) concepts for interns.
Covers:

• drift handling
• resonance thresholds
• DPU operator behavior
• hardware‑level clarity constraints

RTT_NPU/#

The RTT Neural Processing Unit (NPU) module.
Contains:

• README.md — overview of NPU architecture
• Seed_Info.md — seed‑level initialization and resonance mapping
• vNPU_Virtual_NPU_Emulator_with_TFT_and_FFF_logic.md — virtual NPU emulator implementing TFT (Triadic Field Tensor) and FFF (Foundational Frequency Framework) logic

This module defines how RTT operators execute on neural‑aligned substrates.

🧩 How to Reference Hardware Modules#

Inside any module:

See: `docs/hardware/RTT_NPU/README.md`

Or include directly:

{{#include ../hardware/Notes/Interns_DPU_notes.md}}

Hardware modules keep your documentation substrate‑aware, operator‑aligned, and RTT‑ready.